According to media reports on July 20th， Japanese chip manufacturer Rapidus has announced the commencement of test production for 2nm wafers， with mass production anticipated to begin in 2027.
Tomshardware reports that prototyping of test wafers utilizing the 2nm Gate-All-Around (GAA) transistor technology is underway at Rapidus’s IIM-1 factory in Japan. The company has confirmed that early test wafers have achieved their expected electrical characteristics， indicating the proper functioning of the fab tools and smooth progress in process technology development.
Prototyping serves as a significant milestone in semiconductor manufacturing， primarily to validate the reliability， efficiency， and performance targets of early test circuits produced using new technology.
Rapidus is currently measuring the electrical characteristics of its test circuits， including parameters such as threshold voltage， drive current， leakage current， subthreshold slope， switching speed， power consumption， and capacitance.
Furthermore， Rapidus’s IIM-1 factory has proceeded as planned since its groundbreaking in September 2023. The cleanroom was completed in 2024， and as of June 2025， over 200 pieces of equipment have been installed， including advanced DUV and EUV lithography tools.
Historically， Japan’s domestic semiconductor industry struggled after years of intense competition from Taiwan and South Korea. Many of its older production lines had become obsolete， with only a limited number of facilities still operational. Before TSMC’s substantial investment in Japanese factories， Japan faced difficulties in achieving mass production of even 40nm process chips， lagging behind mainland China in process technology.
